1. Field of the Invention
The present invention relates to a dielectric ceramic composition for a multi-layer ceramic capacitor, of which temperature coefficient of capacitance (TCC) characteristics satisfy X5R characteristics (−55° C.˜85° C., ±15%) of the Electronic Industrial Association (EIA) standard. More particularly, the present invention relates to a non reducible dielectric ceramic composition of a high dielectric constant, which can be sintered at a lower temperature and restricted in grain growth, enabling a super thin multi-layer ceramic capacitor, and to a multi-layer ceramic capacitor using the same.
2. Description of the Related Art
With recent advances in development of the electric and electronic industries, high integration, miniaturization and weight reduction of electronic components have been rapidly progressed. As for a ceramic capacitor, in addition to securing an excellent heat resistance and a good reliability, there has also been strong demand for increase in capacitance and reduction in size thereof.
According to the temperature coefficient of capacitance (TCC) based on the EIA standard, the multi-layer ceramic capacitors can be classified into Y5V products ((ΔC/C)×100=−82˜+22%) at a temperature of −50˜85° C.), X5R products ((ΔC/C)×100=±15% at a temperature of −55˜85° C.) and X7R products ((ΔC/C)×100=±15% at a temperature of −55˜125° C.). When further reducing the thickness of a dielectric layer to 3 μm or less, a product having X5R characteristics is generally used.
Meanwhile, as for internal electrodes, although a noble metal, such as Pd or Pd alloys, has generally been used, a base metal, such as Ni or Ni alloys, is put into practical use due to its relatively low price. However, when using the base metal, such as Ni or Ni alloys, for the internal electrodes, there is a problem in that the electrodes are oxidized in a sintering process. Thus, the sintering must be performed under a reducing atmosphere. When sintering under the reducing atmosphere, the dielectric layers are reduced to have a lower insulation resistance (IR). Thus, there has been developed a reduction resistant dielectric material, which is not reduced under the reducing atmosphere.
A non reducible dielectric ceramic composition for the multi-layer ceramic capacitor, which uses the base metal for the internal electrodes, is set forth in Japanese Patent Laid-open Publication No.2000-311828. The dielectric ceramic composition of the invention has a TCC satisfying X7R characteristics of the EIA standard. The dielectric ceramic composition comprises: 100 moles of BaTiO3; 0.1˜3 moles of at least one element selected from MgO, CaO, BaO, SrO and Cr2O3; 2˜12 moles of (Ba, Ca)xSiO2+x (where x=0.8˜1.2); 0.1˜3 moles of at least one element selected from V2O5, MoO3 and WO3; and 0.1˜10 moles of an R oxide (where R is at least one element selected from Y, Dy, Tb, Gd and Ho).
A multi-layer ceramic capacitor using the dielectric ceramic composition disclosed in Japanese Patent Laid-open Publication No.2000-311828 has an advantage in that variation rate of the capacitance with the passage of time and reduction in the capacitance under a DC electric field are low. However, this dielectric ceramic composition should be sintered at a high temperature of 1270° C. or more. Further, when the dielectric layers of the dielectric ceramic composition are laminated into four layers, each of which has a thickness of 3 μm, the multi-layer ceramic capacitor has a dielectric constant of 3,085 or less. Thus, the dielectric layer in the multi-layer ceramic capacitor of the invention cannot be reduced in thickness to 2 μm level and the dielectric constant of the multi-layer ceramic capacitor is also low.
When a sintering temperature is higher than 1200° C., the internal electrodes made of the base metal, such as Ni, shrink earlier than the dielectric layers, so that delamination can easily occur between the layers. Further, the internal electrodes can be easily massed into balls, thereby providing a high possibility of short circuit, and when the dielectric layers are made thinner and thinner, the possibility of the short circuit further increases.
Further, when making thinner dielectric layers, a higher voltage is applied to the dielectric material in a greater quantity, thereby causing reduction in dielectric constant, deterioration in variation rate of the capacitance depending on the temperature, and increase in variation rate of the capacitance by the DC bias. Additionally, when the dielectric layers, each of which has a thickness of 3 μm or less, are made to thinner layers, the number of dielectric particles between the internal electrodes is reduced, making it difficult to ensure stable electrical properties. Thus, there is a need to provide a dielectric ceramic composition, which can be inhibited grain growth of the composition as the thickness of the dielectric layer is reduced. With regard to this, when a higher dielectric constant is achieved for the same particle size, it is more advantageous to make the thinner layers.
The multi-layer ceramic capacitor satisfying the X5R characteristics is required to have the dielectric ceramic composition, which can be sintered at a low temperature of 1200° C. or less, inhibited the grain growth for allowing the super thin layer to be attained, and which can realize in characteristics of a high dielectric constant.